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june 13, 2018 ? 2018 transphorm inc. subject to change without notice. tp65h035w.1 1 TP65H035WS 650v cascode gan fet in to-247 (source tab) features ? jedec qualified gan technology ? dynamic r ds(on)eff production tested ? robust design, defined by intrinsic lifetime tests wide gate safety margin transient over-voltage capability ? very low q rr ? reduced crossover loss ? rohs compliant and halogen-free packaging benefits ? improves efficiency/operation frequencies over si ? enables ac-dc bridgeless totem-pole pfc designs increased power density reduced system size and weight overall lower system cost ? easy to drive with commonly-used gate drivers ? gsd pin layout improves high speed design applications ? datacom ? broad industrial ? pv inverter ? servo motor description the TP65H035WS 650v, 35m? gallium nitride (gan) fet is a normally-off device. it combines state- of -the-art high voltage gan hemt and low voltage silicon mosfet technologies offering superior reliability and performance. transphorm gan offers improved efficiency over silicon, through lower gate charge, lower crossover loss, and smaller reverse recovery charge. related literature ? an0009 : recommended external circuitry for gan fets ? an0003 : printed circuit board layout and probing ? an0010 : paralleling gan fets s g d s TP65H035WS to - 247 (top view) ordering information part number package package configuration TP65H035WS 3 lead to- 247 source key specifications v dss (v) 650 v (tr)dss (v) 800 r ds(on)eff (m?) max* 41 q rr (nc) typ 178 q g (nc) typ 24 * dynamic on-resistance; see figures 17 and 18 common topology power recommendations ccm bridgeless totem-pole* 3770w max hard-switched inverter** 4600w max conditions: f sw =45khz; t j =115 c; t heatsink =90 c; insulator between device and heatsink (6 mil sil-pad? k-10); power de-rates at lower voltages with constant current * ** v in =230v ac ; v out =390v dc v in =380v dc ; v out =240v ac cascode device structure cascode schematic symbol a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 2 TP65H035WS thermal resistance symbol parameter maximum unit r jc junction- to -case 0.8 c/w r ja junction- to -ambient 40 c/w absolute maximum ratings (t c =25c unless otherwise stated.) symbol parameter limit value unit v dss drain to source voltage (t j = - 55 c to 150 c) 650 v v (tr)dss transient drain to source voltage a 800 v gss gate to source voltage 20 p d maximum power dissipation @t c =25 c 156 w i d continuous drain current @t c =25 c b 46.5 a continuous drain current @t c =100 c b 29.5 a i dm pulsed drain current (pulse width: 10s) 240 a (di/dt) rdmc reverse diode di/dt, repetitive c 1800 a/s (di/dt) rdmt reverse diode di/dt, transient d 3800 a/s t c operating temperature case -55 to +150 c t j junction -55 to +150 c t s storage temperature -55 to +150 c t sold soldering peak temperature e 260 c - mounting torque 80 n cm notes: a. in off-state, spike duty cycle d<0.01, spike duration <1s b. for increased stability at high current operation, see circuit implementation on page 3 c. continuous switching operation d. 300 pulses per second for a total duration 20 minutes e. for 10 sec., 1.6mm from the case a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 3 TP65H035WS circuit implementation recommended gate drive: (0v, 12v) with r g = 30? simplified half-bridge schematic efficiency vs output power required dc link rc snubber (rc dcl ) a recommended switching node rc snubber (rc sn ) b, c [10nf + 8 ?] x 2 200pf + 5? notes: a. rc dcl should be placed as close as possible to the drain pin b. a switching node rc snubber (c, r) is recommended for high switching currents (>70% of i rdmc1 or i rdmc2 ; see page 5 for i rdmc1 and i rdmc2 ) c. i rdm values can be increased by increasing r g and c sn a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 4 TP65H035WS electrical parameters (t j =25c unless otherwise stated) symbol parameter min typ max unit test conditions forward device characteristics v (bl)dss drain-source voltage 650 v v gs =0v v gs(th) gate threshold voltage 3.3 4 4.8 v v ds =v gs , i d =1ma v gs(th) /t j gate threshold voltage temperature coefficient -6.5 mv/c r ds(on)eff drain-source on-resistance a 35 41 m? v gs =10v, i d =30a 72 v gs =10v, i d =30a, t j =150 c i dss drain- to -source leakage current 2.5 25 a v ds =650v, v gs =0v 15 v ds =650v, v gs =0v, t j =150 c i gss gate- to -source forward leakage current 400 na v gs =20v gate- to -source reverse leakage current - 400 v gs =- 20v c iss input capacitance 1500 pf v gs =0v, v ds =400v, f =1mhz c oss output capacitance 190 c rss reverse transfer capacitance 10 c o(er) output capacitance, energy related b 290 pf v gs =0v, v ds =0v to 400v c o(tr) output capacitance, time related c 440 q g total gate charge 24 36 nc v ds =400 v, v gs =0v to 10v, i d =32a q gs gate-source charge 10 q gd gate-drain charge 6 q oss output charge 178 nc v gs =0 v, v ds =0v to 400v t d(on) turn-on delay 69 ns v ds =400 v, v gs =0v to 12v, i d =32a, r g = 30 t r rise time 13.5 t d(off) turn-off delay 98.5 t f fall time 11.5 notes: a. dynamic on-resistance; see figures 17 and 18 for test circuit and conditions b. equivalent capacitance to give same stored energy as v ds rises from 0v to 400v c. equivalent capacitance to give same charging time as v ds rises from 0v to 400v a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 5 TP65H035WS electrical parameters (t j =25c unless otherwise stated) symbol parameter min typ max unit test conditions reverse device characteristics i s reverse current 29.5 a v gs =0v, t c =100 c 20% duty cycle v sd reverse voltage a 1.8 v v gs =0v, i s =32a 1.3 v gs =0v, i s =15a t rr reverse recovery time 65 ns i s =30a, v dd =400v, di/dt=1000a/s q rr reverse recovery charge 178 nc (di/dt) rdmc reverse diode di/dt, repetitive b 1800 a/s i rdmc1 reverse diode switching current, repeti- tive (dc) c, e 28 a circuit implementation and parameters on page 3 i rdmc2 reverse diode switching current, repeti- tive (ac) c, e 35 a circuit implementation and parameters on page 3 (di/dt) rdmt reverse diode di/dt, transient d 3800 a/s i rdmt reverse diode switching current, transi- ent d,e 45 a circuit implementation and parameters on page 3 notes: a. includes dynamic r ds(on) effect b. continuous switching operation c. definitions: dc = dc- to -dc converter topologies; ac = inverter and pfc topologies, 50-60hz line frequency d. 300 pulses per second for a total duration 20 minutes e. i rdm values can be increased by increasing r g and c sn on page 3 a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 6 TP65H035WS typical characteristics (t c =25c unless otherwise stated) figure 1. typical output characteristics t j =25c parameter: v gs figure 2. typical output characteristics t j =150c parameter: v gs figure 3. typical transfer characteristics v ds =10v, parameter: t j figure 4. normalized on-resistance i d =30a, v gs =10v a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 7 TP65H035WS typical characteristics (t c =25c unless otherwise stated) figure 5. typical capacitance v gs =0v, f=1mhz figure 6. typical c oss stored energy figure 7. typical q oss figure 8. forward characteristics of rev. diode i s =f(v sd ), parameter: t j a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 8 TP65H035WS typical characteristics (t c =25c unless otherwise stated) figure 9. power dissipation figure 10. current derating pulse width 10s, v gs 10v figure 11. safe operating area t c =25c figure 12. transient thermal resistance a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 9 TP65H035WS figure 14. switching time waveform test circuits and waveforms figure 13. switching time test circuit (see circuit implementation on page 3 for methods to ensure clean switching) figure 15. diode characteristics test circuit figure 16. diode recovery waveform figure 17. dynamic r ds(on)eff test circuit figure 18. dynamic r ds(on)eff waveform d ds(on) ds(on)eff i v r a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 10 TP65H035WS design considerations the fast switching of gan devices reduces current-voltage crossover losses and enables high frequency operation while simultaneously achieving high efficiency. however, taking full advantage of the fast switching characteristics of gan switche s requires adherence to specific pcb layout guidelines and probing techniques. before evaluating transphorm gan devices, see application note printed circuit board layout and probing for gan power switches . the table below provides some practical rules that should be followed during the evaluation. when evaluating transphorm gan devices: do do not minimize circuit inductance by keeping traces short, both in the drive and power loop twist the pins of to-220 or to-247 to accommodate gds board layout minimize lead length of to-220 and to-247 package when mounting to the pcb use long traces in drive circuit, long lead length of the devices use shortest sense loop for probing; attach the probe and its ground connection directly to the test points use differential mode probe or probe ground clip with long wire see an0003 : printed circuit board layout and probing gan design resources the complete technical library of gan design tools can be found at transphormusa.com/design : ? evaluation kits ? application notes ? design guides ? simulation models ? technical papers and presentations a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 11 TP65H035WS mechanical 3 lead to-247 package a ll data sheet.com
june 13, 2018 transphormusa.com tp65h035w.1 12 TP65H035WS revision history version date change(s) 0 11/22/2017 initial 1 6/13/2018 datasheet completed 2 11/20/2018 add max mouting torque a ll data sheet.com

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